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Chip Design

!chipdesign@lemmy.ml
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ASML sets new EUV chipmaking density record, proposes Hyper-NA tools and radical EUV speed boosts(www.tomshardware.com)

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ylai@lemmy.ml
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4500 Fab Jobs Could Go Unfilled in U.S. by 2030(spectrum.ieee.org)

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ylai@lemmy.ml
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TSMC’s debacle in the American desert(restofworld.org)

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ylai@lemmy.ml
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Intel Receives ASML’s First High NA EUV system(www.youtube.com)

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Meta seeks ASIC designers for ML accelerators and datacenter SoCs – Appears to be struggling to find them, even in India, as it's re-posted job ads(www.theregister.com)

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ylai@lemmy.ml
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Chip Packaging Trumps EDA: Why Synopsys Is Paying $35 Billion For Ansys(www.nextplatform.com)

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ylai@lemmy.ml
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Synopsys to acquire graphics software maker Ansys in $35 billion tech deal(www.cnbc.com)

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ylai@lemmy.ml
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Polynomial Formal Verification: Verification-Centric Strategy(agra.informatik.uni-bremen.de)

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hardware26@discuss.tchncs.de
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5 Steps to Confront the Talent Shortage With IP-Centric Design(www.eetimes.com)

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It’s the manufacturing, stupid!(bits-chips.nl)

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Chip Industry Talent Shortage Drives Academic Partnerships(semiengineering.com)

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hardware26@discuss.tchncs.de
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Google's Controversial AI Chip Paper Under Scrutiny Again(www.hpcwire.com)

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ylai@lemmy.ml
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Using LLMs to Facilitate Formal Verification of RTL(arxiv.org)

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Growing full wafers of high-performing 2D semiconductor that integrates with state-of-the-art chips(techxplore.com)

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Test Strategies In The Era Of Heterogeneous Integration(semiengineering.com)

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Use Cases And Value Proposition Of eFPGA (Embedded FPGA)(semiengineering.com)

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Challenges In Ramping New Manufacturing Processes(www.youtube.com)

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Cadence Collaborates with Arm to Accelerate Neoverse V2 Data Center Design Success with Cadence AI-driven Flows(www.cadence.com)

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The dream of a chiplet marketplace is still a long way off(www.google.com)

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Great Introduction to Formal Verification : "Formal Verification An Essential Toolkit For Modern VLSI Design"(discuss.tchncs.de)

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Tensor Processing Units: History and hardware(www.youtube.com)

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hardwareteams@lemmy.mlM
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German investment in open-source chip design(www.elektronikforschung.de)

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teri@discuss.tchncs.de
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Free Silicon Conference 2023, Paris, July 10-12(wiki.f-si.org)

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teri@discuss.tchncs.de
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How a CPU works: Bare metal C on my RISC-V toy CPU(florian.noeding.com)

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hardwareteams@lemmy.mlM
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integrated circuit made in a garage(sam.zeloof.xyz)

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Chip Design

!chipdesign@lemmy.ml

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A community for the discussion of all things related to the creation (not usage of!) integrated circuits, both circuit- and process-level.

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